James R. Potashnik
James R. Potashnik is an Attorney and earned his Juris Doctor degree, cum laude, from the University of Akron School of Law in 2011 and was admitted to practice law in Ohio in 2011. His technical areas of expertise include physics and electrical engineering. James received a Bachelor of Science degree in Physics cum laude from John Carroll University in 2001. He also received a Master of Engineering in Electrical Engineering in 2003 from the University of Notre Dame, where he was a research fellow, and a Master of Science in Physics in 2005 from the Ohio State University, where he was also a research fellow.
While attending law school at the University of Akron James worked as a full-time patent engineer and prepared and prosecuted more than 200 patent applications in a variety of technology disciplines including semiconductor fabrication and communication systems. He was also an assistant editor of the Law Review and authored an article on the international infringement of patents that was selected for publication in the University of Akron Intellectual Property Law Journal. He was also recognized for his outstanding achievement in the area of International law and Intellectual property taxation.
Prior to his work at the firm, James was a development engineer with IBM in East Fishkill, NY. While at IBM he worked on groundrule development for the 45 nm and 32nm technology nodes. In particular, he focused on back end metallization and passive devices. During the course of his career, he has also worked in the field of high energy physics (making fiber optic wave guides used in Fermi Lab’s CDF particle detector, performing Monte Carlo simulations of B physics, and performing generator level simulations of Higgs processes and backgrounds to be used in association with Fermi Lab’s D0 particle detector), polymer electronics (studying the operation and fabrication of organic based semiconductors), and has extensive course work in electromagnetics, quantum mechanics, and thermodynamics.
J. Potashnik, A. Gabor, P. Selvam, “Design Polishing,” Presented at Litho Symposium 2006, hosted by IBM, Yorktown Heights, New York (2006).
R.E. Belford, W. Zhao, J. Potashnik, Q. Liu, and A. Seabaugh, “Performance-augmented CMOS using back-end uniaxial strain”, 60th Device Research Conference Digest, IEEE catalog number 02TH8606, 41-42 (2002).